Freescale Semiconductor e200z3 Reference Manual page 120

Power architecture core
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Register Model
Mnemonic
CTR
Count register
CTXCR
Context control register
DAC1
Data address compare 1
DAC2
Data address compare 2
DVC1
Data value compare 1
DVC2
Data value compare 2
DBCNT
Debug counter register
DBCR0
Debug control register 0
DBCR1
Debug control register 1
DBCR2
Debug control register 2
DBCR3
Debug control register 3
DBSR
Debug status register
DEAR
Data exception address register
DEC
Decrementer
DECAR
Decrementer auto-reload
DSRR0
Debug save/restore register 0
DSRR1
Debug save/restore register 1
ESR
Exception syndrome register
HID0
Hardware implementation dependent reg 0
HID1
Hardware implementation dependent reg 1
IAC1
Instruction address compare 1
IAC2
Instruction address compare 2
IAC3
Instruction address compare 3
IAC4
Instruction address compare 4
IVOR0
Interrupt vector offset register 0
IVOR1
Interrupt vector offset register 1
IVOR2
Interrupt vector offset register 2
IVOR3
Interrupt vector offset register 3
IVOR4
Interrupt vector offset register 4
IVOR5
Interrupt vector offset register 5
IVOR6
Interrupt vector offset register 6
IVOR7
Interrupt vector offset register 7
IVOR8
Interrupt vector offset register 8
2-72
Table 2-40. Special-Purpose Registers (continued)
Name
e200z3 Power Architecture Core Reference Manual, Rev. 2
SPR Number
Access
9
R/W
1
560
R/W
316
R/W
317
R/W
318
R/W
319
R/W
562
R/W
308
R/W
309
R/W
310
R/W
561
R/W
2
304
Read/Clear
61
R/W
22
R/W
54
R/W
574
R/W
575
R/W
62
R/W
1008
R/W
1009
R/W
312
R/W
313
R/W
314
R/W
315
R/W
400
R/W
401
R/W
402
R/W
403
R/W
404
R/W
405
R/W
406
R/W
407
R/W
408
R/W
Privileged
e200z3-Specific
No
No
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
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