Freescale Semiconductor e200z3 Reference Manual page 383

10.4.6 Read/Write Access Data Register (RWD)
The read/write access data register, shown in
memory-mapped locations when initiating a read or a write access.
31
Field
Reset
R/W
Number
Read/write accesses to the AHB require that the debug firmware properly retrieve/place the data in the
RWD. Table 10-15 shows the proper placement of data into the RWD. Note that double-word transfers
require two passes through RWD.
Transfer Size
and Byte Offset
Doubleword
First RWD pass (low order data)
Second RWD pass (high order data)
Note:
"X" indicates byte lanes with valid data
"—" indicates byte lanes which will contain unused data.
Freescale Semiconductor
Figure
Figure 10-9. Read/Write Access Data Register (RWD)
Table 10-15. RWD data placement for Transfers
RWA(2–0)
Byte x x x
Half x x 0
Word x 0 0
0 0 0
e200z3 Power Architecture Core Reference Manual, Rev. 2
10-9, provides the data to/from system bus
Read/Write Data
All zeros
Read/Write
0x9
RWCS[SZ]
31–24 23–16
0 0 0 —
0 0 1 —
0 1 0 X
0 1 1
X
X
Nexus3/Nexus2+ Module
0
RWD
15–8 7–0
— — X
— X X
X X X
X X X
X X X
10-17