Table of Contents
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Organization
Following is a summary and a brief description of the major sections of this manual:
•
Chapter 1, "e200z335 Core Complex Overview,"
functionality.
•
Chapter 2, "Register Model,"
programming model for the three programming environments and the functionality of each
register.
•
Chapter 3, "Instruction Model,"
of the instructions. Instructions are organized by function.
•
Chapter 4, "Interrupts and Exceptions,"
as it is defined by the Book E architecture.
•
Chapter 5, "Memory Management Unit,"
regarding the e200z3 MMU implementation.
•
Chapter 6, "Instruction Pipeline and Execution Timing,"
decoded, issued, executed, and completed, and how instruction results are presented to the
processor and memory system. Tables are provided that indicate latency and throughput for each
of the instructions supported by the e200z3.
•
Chapter 7, "External Core Complex Interfaces,"
configurable or that provide status information through the programming interface. It provides a
glossary of signals mentioned throughout the book to offer a clearer understanding of how the core
is integrated as part of a larger device.
•
Chapter 8, "Power Management,"
by Book E and implemented in the e200z3 core.
•
Chapter 9, "Debug Support,"
implemented in the e200z3 core.
•
Chapter 10, "Nexus3/Nexus2+ Module,"
real-time development capabilities for e200z3 processors in compliance with the IEEE-ISTO
Nexus 5001-2003 standard.
•
This book also includes an index.
Suggested Reading
This section lists additional reading that provides background for the information in this manual as well as
general information about the architecture.
General Information
The following documentation, published by Morgan-Kaufmann Publishers, 340 Pine Street, Sixth Floor,
San Francisco, CA, provides useful information about the PowerPC architecture and computer architecture
in general:
viii
is useful for software engineers who need to understand the
provides an overview of the addressing modes and a description
describes how the e200z3 implements the interrupt model
provides specific hardware and software details
describes the power management facilities as they are defined
describes the debug facilities as they are defined by Book E and
describes the e200z3 Nexus3 module, which provides
e200z3 Power Architecture Core Reference Manual, Rev. 2
provides a general description of e200z3
describes how instructions are fetched,
describes those aspects of the CCB that are
Freescale Semiconductor
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