Freescale Semiconductor e200z3 Reference Manual page 391

Power architecture core
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10.7
Program Trace
This section details the program trace mechanism supported by Nexus3/Nexus2+ for the e200z3 processor.
Program trace is implemented using branch trace messaging (BTM) as required by the class 3 IEEE-ISTO
5001-2003 standard definition. Branch trace messaging for e200z3 processors is accomplished by
snooping the e200z3 virtual address bus, between the CPU and MMU, attribute signals, and CPU status
p_pstat[0:5].
10.7.1
Branch Trace Messaging (BTM)
Traditional branch trace messaging facilitates program trace by providing the following types of
information:
Messaging for taken direct branches includes how many sequential instructions were executed
since the last taken branch or exception. Direct or indirect branches not taken are counted as
sequential instructions.
Messaging for taken indirect branches and exceptions includes how many sequential instructions
were executed since the last taken branch or exception and the unique portion of the branch target
address or exception vector address.
Branch history messaging facilitates program trace by providing the following information:
Messaging for taken indirect branches and exceptions includes how many sequential instructions
were executed since the last predicate instruction, taken indirect branch, or exception, the unique
portion of the branch target address or exception vector address, and a branch/predicate instruction
history field. Each bit in the history field represents a direct branch or predicated instruction where
a value of one indicates taken and a value of zero indicates not taken. Certain instructions (evsel)
generate a pair of predicate bits that are both reported as consecutive bits in the history field.
10.7.1.1
e200z3 Indirect Branch Message Instructions (Book E)
Table 10-21
shows the types of instructions and events that cause indirect branch messages or branch
history messages to be encoded.
Source of Indirect Branch Message
Taken branch relative to a register value
System call/trap exceptions taken
Return from interrupts/exceptions
10.7.1.2
e200z3 Direct Branch Message Instructions (Book E)
Table 10-22
shows the types of instructions that cause direct branch messages or that toggle a bit in the
instruction history buffer to be messaged out in a resource full message or branch history message.
Freescale Semiconductor
Table 10-21. Indirect Branch Message Sources
e200z3 Power Architecture Core Reference Manual, Rev. 2
Nexus3/Nexus2+ Module
Instructions
bcctr, bcctrl, bclr, bclrl, se_bctr,
se_bctrl, se_blr, se_blrl
sc, se_sc, tw, twi
rfi, rfci, rfdi, se_rfi, se_rfci,
se_rfdi
10-25

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