Freescale Semiconductor e200z3 Reference Manual page 419

Table 10-35. Indirect Branch Message Example (2 MDO/1 MSEO)
Clock
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
T0 and S0 are the least significant bits, where Tx = TCODE number (fixed);
Sx = Source processor (fixed); Ix = Number of instructions (variable); Ax = Unique
portion of the address (variable).
Table 10-36. Indirect Branch Message Example (8 MDO/2 MSEO)
Clock
0 X X
1 S1 S0
2 I5 I4
3 A7 A6
4 S1 S0
1
T0 and S0 are the least significant bits, where Tx = TCODE number (fixed); Sx = Source processor (fixed);
Ix = Number of instructions (variable); Ax = Unique portion of the address (variable).
Freescale Semiconductor
nex_mdo[1:0] nex_mseo_b
X X 1
T1 T0 0
T3 T2 0
T5 T4 0
S1 S0 0
S3 S2 0
I1 I0 0
I3 I2 0
I5 I4 1
A1 A0 0
A3 A2 0
A5 A4 0
A7 A6 1
0 0 1
T1 T0 0
nex_mdo[7:0]
X X X X X
T5 T4 T3 T2 T1
I3 I2 I1 I0 S3
A5 A4 A3 A2 A1
T5 T4 T3 T2 T1
e200z3 Power Architecture Core Reference Manual, Rev. 2
State
Idle (or end of last message)
Start message
Normal transfer
Normal transfer
Normal transfer
Normal transfer
Normal transfer
Normal transfer
End packet
Normal transfer
Normal transfer
Normal transfer
End packet
Note: During clock 12, the nex_mdo[n:0]
pins are ignored in the single-MSEO
case.
End message
Start message
nex_mseo_b[1:0]
X 1 1
T0 0 0
S2 0 1
A0 1 1
T0 0 0
Nexus3/Nexus2+ Module
1
1
State
Idle (or end of last message)
Start message
End packet
End packet/end message
Start message
10-53