Freescale Semiconductor e200z3 Reference Manual page 142

Instruction Model
Vector Round Word
Vector Select
Vector Shift Left Word
Vector Shift Left Word Immediate
Vector Shift Right Word Immediate Signed
Vector Shift Right Word Immediate Unsigned
Vector Shift Right Word Signed
Vector Shift Right Word Unsigned
Vector Splat Fractional Immediate
Vector Splat Immediate
Vector Store Double of Double
Vector Store Double of Double Indexed
Vector Store Double of Four Half Words
Vector Store Double of Four Half Words Indexed
Vector Store Double of Two Words
Vector Store Double of Two Words Indexed
Vector Store Word of Two Half Words from Even
Vector Store Word of Two Half Words from Even Indexed
Vector Store Word of Two Half Words from Odd
Vector Store Word of Two Half Words from Odd Indexed
Vector Store Word of Word from Even
Vector Store Word of Word from Even Indexed
Vector Store Word of Word from Odd
Vector Store Word of Word from Odd Indexed
Vector Subtract from Word
Vector Subtract Immediate from Word
Vector Subtract Signed, Modulo, Integer to Accumulator Word
Vector Subtract Signed, Saturate, Integer to Accumulator Word
Vector Subtract Unsigned, Modulo, Integer to Accumulator Word
Vector Subtract Unsigned, Saturate, Integer to Accumulator Word
Vector XOR
1
An implementation can restrict the number of bits specified in a mask. The e200z3 limits it to 16 bits, which allows the
user to perform bit-reversed address computations for 65536-byte samples.
3-14
Table 3-7. SPE APU Vector Instructions (continued)
Instruction
e200z3 Power Architecture Core Reference Manual, Rev. 2
Mnemonic Syntax
evrndw rD,rA
evsel rD,rA,rB,crS
evslw rD,rA,rB
evslwi rD,rA,UIMM
evsrwis rD,rA,UIMM
evsrwiu rD,rA,UIMM
evsrws rD,rA,rB
evsrwu rD,rA,rB
evsplatfi rD,SIMM
evsplati rD,SIMM
evstdd rS,d(rA)
evstddx rS,rA,rB
evstdh rS,d(rA)
evstdhx rS,rA,rB
evstdw rS,d(rA)
evstdwx rS,rA,rB
evstwhe rS,d(rA)
evstwhex rS,rA,rB
evstwho rS,d(rA)
evstwhox rS,rA,rB
evstwwe rS,d(rA)
evstwwex rS,rA,rB
evstwwo rS,d(rA)
evstwwox rS,rA,rB
evsubfw rD,rA,rB
evsubifw rD,UIMM,rB
evsubfsmiaaw rD,rA
evsubfssiaaw rD,rA
evsubfumiaaw rD,rA
evsubfusiaaw rD,rA
evxor rD,rA,rB
Freescale Semiconductor