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ICCNSE—I/O Control Chip Node-Specific Error Reg
Address
BB + 2040
Access
R/W
The ICCNSE register logs the collective error information relative
to the internal operations of the I/O port.
The following errors leave the I/O port in an Unpredictable state.
If any of these errors occur, the I/O port should be reset to initial-
ize it to a predictable state.
NOTE: Some errors are specific to the IDR0–3 data path gate arrays. These
errors are generally logged in the IDPNSE0–3 registers, which are physi-
cally located in the IDR0–3 gate arrays.
This register is physically located in the ICR gate array.
31 30 29 28 27 26 25 24 23 22 21 20 19
0
UP_HDR_IE<1:0>
ICR_IE
ICR_UP_VRTX_ERR<1:0>
DN_VRTX_ERR<1:0>
16 15
MULT_INTR_ERR
DN_VRTX_ERR
UP_VRTX_ERR
ICR_IE
ICR_CSR_BUS_PE
TLSB_WND_OFLO
INTR_NSES
12 11
8
7
UN_MBX_STAT
UP_HOSE_OFLO
UP_HOSE_PKT_ERR
UP_HOSE_PAR_ERR
UP_HDR_IE
System Registers 7-117
4
3
0
RSVD
BXB-0767-94
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