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Each IDR on the I/O port receives 64 data bits and 8 ECC bits from the
TLSB. Error checking is performed and if a data error is detected, the
IDR(s) set the appropriate error bit in the TLESRn register. The IDR(s)
also informs the ICR that a data error, either hard or soft, has been de-
tected. The ICR asserts TLSB_DATA_ERROR on the TLSB to inform
other nodes monitoring the bus that a data error was detected. This asser-
tion of TLSB_DATA_ERROR occurs ten cycles after the first of the two
data cycles for the data transaction. TLSB_DATA_ERROR is only as-
serted for one cycle, and it is always the tenth cycle after hexword zero
(HW0). Therefore, the assertion of TLSB_DATA_ERROR itself cannot be
used to determine which data cycle(s) were in error. Nor can TLSB_
DATA_ERROR be used to determine the severity of the error.
The I/O port monitors the TLSB_DATA_ERROR signal and sets TL-
BER<DTDE> if it was the transmitter of the data for which TLSB_DATA_
ERROR was asserted. Note that monitoring TLSB_DATA_ERROR signal
to set TLBER<DTDE> is independent of the error checking logic to assert
TLSB_DATA_ERROR. In other words, if another node detects an error on
data supplied by the I/O port, but the I/O port does not detect an error, the
I/O port still sets <DTDE> in response to the assertion of TLSB_DATA_
ERROR.
6.7.5.2
TLSB_FAULT
The I/O port drives the TLSB_FAULT signal to broadcast the detection of
the following fatal error conditions:
Details of these error conditions are given in the descriptions of the TL-
BER and IDPNSEn registers.
Since the assertion of TLSB_FAULT signals a system fatal error, it must
never be be disabled unless for diagnostics.
Unlike TLSB_DATA_ERROR, which is asserted for one cycle only,
TLSB_FAULT is required to be asserted for two cycles and only two cy-
cles. Since TLSB_FAULT can be asserted in any cycle, the I/O port, like
all nodes, must monitor the TLSB_FAULT signal for prior assertion by
6-68 I/O Port
TLBER<DTO> - Data TimeOut
TLBER<DSE> - Data Status Error
TLBER<SEQE> - Sequence Error
TLBER<DCTCE> - Data Control Transmit Check Error
TLBER<ABTCE> - Address Bus Transmit Check Error
TLBER<UACKE> - Unexpected Acknowledge Error
TLBER<FDTCE> - Fatal Data Transmit Check Error
TLBER<REQDE> - Request Deassertion Error
TLBER<FNAE> - Fatal No Acknowledge Error
TLBER<ACKTCE> - Acknowledge Transmit Check Error
TLBER<RTCE> - Request Transmit Check Error
TLBER<BAE> - Bank Busy Violation
TLBER<APE> - Address Parity Error
TLBER<ATCE> - Address Transmit Check Error
TLBER<BAE> - Bank Busy Violation
ICCNSE<TLSB_RM_OFLO> - TLSB Mem. Channel Buffer Overflow
ICCNSE<TLSB_WND_OFLO> - TLSB Window Overflow
ICCNSE<ICR_IE> - ICR Internal Error
IDPNSE<IDR_IE> - IDR Internal Error
IDPNSE<IDR_CMD_PE> - IDR Command Parity Error
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