Error Signals; Address Bus Errors; Transmit Check Errors - DEC AlphaServer 8200 Technical Manual

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2.4.2 Error Signals

The TLSB provides two signals for broadcasting the detection of an error to
other nodes. All nodes monitor the error signals, TLSB_DATA_ERROR
and TLSB_FAULT (Section 2.2.9) , to latch status relative to the error.
Except for system fatal errors, only the commander (CPU or I/O node)
checks whether a command completes with or without errors. The com-
mander monitors the error signals to determine if any error was detected
by another node. A commander node that cannot handle an error condition
alone (for example, an I/O node) is expected to use some other means of in-
forming the responder CPU node of the error condition.
Error status is latched to allow software to collect state information and
determine a response. The CPU generates an appropriate interrupt to ac-
tivate the status collection software. The software is responsible for clear-
ing the error status in each node before the next error if the system is to
continue operating. Should a second error occur before previous status is
cleared, some status from the previous error may be overwritten. Multiple
errors are not handled. In such an occurrence, information may be lost.

2.4.3 Address Bus Errors

The TLSB address bus uses parity protection. All drivers on the TLSB
check the data received from the bus against the expected data driven on
the bus. This combination assures a high level of error detection.
All nodes monitor the address bus command fields during valid transac-
tions. The state of the command fields during idle bus cycles is Undefined.
Good parity is not guaranteed.
Proper operation of the address bus is critical for ensuring system integ-
rity. Distributed arbitration relies on all nodes seeing the same control
signals and commands to update node priorities and associate the com-
mands with their respective data bus cycles. Consequently, most errors
detected on the address bus are system fatal.
2.4.3.1

Transmit Check Errors

A node must check that its bus assertions get onto the bus properly by
reading from the bus and comparing it to what was driven. A mismatch
can occur because of a hardware error on the bus, or if two nodes attempt
to drive the fields in the same cycle. A mismatch results in the setting of a
bit in the TLBER register and possibly the assertion of TLSB_FAULT.
There are two types of transmit checks:
• Level transmit checks are used when signals are driven by a single
node in specific cycles. The assertion or deassertion of each signal is
compared to the level driven. Any signal not matching the level driven
is in error. Level transmit checks are performed in specific cycles. For
example, TLSB_CMD<2:0> is level-checked when a node is transmit-
ting a command on the bus. The value on all three signal wires should
be received exactly as transmitted.
• Assertion transmit checks are used on signals that may be driven by
multiple nodes or when the assertion of a signal is used to determine
timing. An error is declared only when a node receives a deasserted
value and an asserted value was driven. These checks are performed
TLSB Bus 2-35

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