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ICCNSE register, 7-117
ICCWTR register, 7-127
ICC and IDP internal illogical errors, 6-77
ICC CSR Bus Par Err bit, 7-118
ICC Internal Error bit, 7-118
ICFR, 7-108
ICR_CSR_BUS_PE, 7-118
ICR_IE, 7-118
IDENT, 7-30
Identification Vector bits, 7-30
IDPDR register, 7-133
IDPMSR Data Path Mode Select register,
7-138
IDPMSR register, 7-138
IDPNSE register, 7-128
IDPVR register, 7-137
IDR Command Par Err bit, 7-130
IDR CSR Bus Par Err bit, 7-129
IDR Internal Error bit, 7-129
IDR Up Vortex Error bits, 7-130
IDR_CMD_PAR_ERR, 7-130
IDR_CSR_BUS_PAR_ERR, 7-129
IDR_INTR_ERR, 7-129
IDR_UP_VRTX_ERR<1:0>, 7-130
Illegal sequence errors, 2-40, 6-73
Information Base Repair register, 7-140
Inhibit Clear on Run bit, 7-108
Input latches, 5-2
Instruction cache, 4-1
Integrated I/O section, 6-80, 6-81
Integrated I/O section transactions, 6-83
Interface, hose, 6-35
Interface, PCI, 6-81
Interleave, 4-15
Interleave bits, 7-22, 7-88
Interleave field values, 2-9
Interleave Mask bits, 7-22
Interlocked read/unlock write, 6-25
Interlock read, 6-55
Interlock read packet, 6-56
Interlock read packet size, 6-56
Internal cache, 4-1
Interprocessor interrupts, 8-5
Interprocessor Interrupt bit, 7-67
Interprocessor Interrupt Enable bit, 7-64
Interprocessor Interrupt Mask bits, 7-35
Interprocessor Interrupt register, 7-35
Interrupts
nonvectored, 8-3
vectored, 8-1
Interrupts, CPU module, 8-6
Interrupts, error, I/O port generated, 6-9
Interrupts, interprocessor, 8-5
Interrupts, module level, 8-6
Interrupts, remote bus, 6-8
Interrupt conditions, 8-6
Interrupt generation, 8-5
Interrupt Level bits, 7-36
Interrupt Level IDENT registers, 7-30
Interrupt Mask register, 7-63
Interrupt on NSES bit, 7-118
Interrupt operation, I/O port, 8-2
Interrupt principles, 8-3
Interrupt registers, TLIOINTR, 8-4
Interrupt rules
CPU, 8-2
I/O port, 8-1
Interrupt servicing, 8-5
Interrupt Source register, 7-65
Interrupt transactions, 6-8, 6-26, 6-84
Interval Timer Interrupt bit, 7-67
Interval Timer Interrupt Enable bit, 7-64
INTIM_ENA, 7-64
INTIM_INTR, 7-67
INTL, 7-36
INTLV, 7-22, 7-88
INTLV_EN, 7-71, 7-111
INTMASK, 7-22
INTR/IDENT, 6-60
INTR/IDENT packet, 6-60, 6-61
INTR/IDENT status return packet, 6-44, 6-45
INTR_NSES, 7-118
IN_PROG, 7-73
IO_SPACE, 3-12
IPL 17 error interrupts, 6-69
IPL14 Interrupt bit, 7-67
IPL14 Interrupt Enable bit, 7-64
IPL14_ENA, 7-64
IPL14_INTR, 7-67
IPL15 Interrupt bit, 7-67
IPL15 Interrupt bits, 7-66
IPL15 Interrupt Enable bit, 7-64
IPL15_ENA, 7-64
IPL15_INTR, 7-66, 7-67
IPL16 Interrupt bit, 7-67
IPL16 Interrupt bits, 7-66
IPL16 Interrupt Enable bit, 7-64
IPL16_ENA, 7-64
IPL16_INTR, 7-66, 7-67
IPL17 Interrupt bit, 7-67
IPL17 Interrupt bits, 7-66
IPL17 Interrupt Enable bit, 7-64
IPL17_ENA, 7-64
IPL17_INTR, 7-66, 7-67
IP_ENA, 7-64
IP_INTR, 7-67
I/O architecture, overview, 1-5
I/O Chip Mode Select register, 7-112
I/O configuration, 6-2
I/O Control Chip Diagnostic register, 7-122
I/O Control Chip Mailbox Transaction register,
7-125
Index-7
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