Mir Register Bit Definitions - DEC AlphaServer 8200 Technical Manual

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Table 7-42 MIR Register Bit Definitions
Name
Bit(s)
<31>
VALID
<30:3>
RSVD
<2:0>
INTLV
7-88 System Registers
Type
Function
R/W, 0
Valid. When set, enables the module to re-
spond to TLSB memory space transactions.
R0
Reserved. Read as zero.
R/W, 0
Interleave. The value of this field loaded by
console during system initialization determines
whether this module is 1,2,4,8 or 16-way inter-
leaved in the system.
INTLV
(Hex)
0
0
1
1
2
2
3
3
4
5,6,7,
Banks/
No of
Module
Modules
1
1
2
1
1
2
2
1
1
4
2
2
1
8
2
4
2
8
Interleave
1-way
Reserved
2-way
2-way
4-way
4-way
8-way
8-way
16-way
Reserved

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