Csr Address Space Regions; Tlsb Csr Address Bit Mapping - DEC AlphaServer 8200 Technical Manual

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Figure 2-4

TLSB CSR Address Bit Mapping

2.3.1 CSR Address Space Regions

A total of 1 terabyte of physical address space can be mapped directly to
the TLSB. Physical address bit <39> normally indicates an I/O space ref-
erence from the CPU, so the first 512 Gbytes are reserved, and all address
bits can be mapped directly to the TLSB address bus. Physical address
bits <2:0> do not appear on the bus.
The CSR address space is divided into regions using address bits <39:36>
as shown in Table 2-6.
Regions 8 through C access an I/O node by the physical node ID 4 through
8, respectively. The node must be occupied to acknowledge this address.
The mapping within each region to individual remote CSRs is implementa-
tion specific.
Table 2-6

CSR Address Space Regions

TLSB_ADR
<39:36>
Address Range
Reserved
0–7
Remote CSR Window Space on Node 4
8
Remote CSR Window Space on Node 5
9
A
Remote CSR Window Space on Node 6
Remote CSR Window Space on Node 7
B
Remote CSR Window Space on Node 8
C
Reserved
D–E
Local TLSB Node CSRs
F
Local CSRs are accessed within region F of the CSR address space. Local
CSRs are aligned on 64-byte boundaries. Bits TLSB_ADR<35:6> of the ad-
dress field in a CSR read or write command are used to specify all local
CSR accesses. TLSB_ADR<5:3> are zero during local CSR commands and
should be ignored by all nodes receiving this address. Figure 2-5 shows
the TLSB CSR space map.
2-26 TLSB Bus
39
Processor Byte Address
39
CSR Address
3
2
0
Address
3
Bus
Field
BXB0827.AI
Access
00 0000 0000 – 7F FFFF FFF8
80 0000 0000 – 8F FFFF FFF8
90 0000 0000 – 9F FFFF FFF8
A0 0000 0000 – AF FFFF FFF8
B0 0000 0000 – BF FFFF FFF8
C0 0000 0000 – CF FFFF FFF8
D0 0000 0000 – EF FFFF FFF8
F0 0000 0000 – FF FFFF FFF8

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