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Gbus Registers - DEC AlphaServer 8200 Technical Manual

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Table of Contents

Table 7-20 CPU Module Registers (Continued)

Module Registers

CPU Chip Registers

Table 7-21 Gbus Registers

GBUS$TLSBRST

7-46 System Registers

Memory Channel Range Register for channel 0

Memory Channel Range Register for channel 1

Interrupt Mask Register for CPU0

Interrupt Mask Register for CPU1

Interrupt Source Register for CPU0

Interrupt Source Register for CPU1

FF C000 0000

FF C100 0000

FF C200 0000

FF C300 0000

FF C400 0000

FF C500 0000

FF C600 0000

FF C700 0000

FF C800 0000

Alphaserver 8400