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6.6.2.1
Sparse Address Mapping
A sparse address space uses low-order TLSB address bits to encode the
size of the access and its byte offset. The I/O port interprets an Alpha
physical address in the window space as:
The interpretation of the length field and the number of significant ad-
dress bits are I/O bus adapter and I/O port dependent. However, the
sparse space packets provide only 27 bits to hold the remote I/O bus ad-
dress. A sparse space packet can contain up to one quadword of data.
6.6.2.2
Dense Address Mapping
A dense address space supports access only to longword-aligned locations.
Since low-order TLSB address bits are treated normally, addresses that
are contiguous on the remote I/O bus are contiguous in TLSB space. This
allows CPU read and write merge buffers to accumulate multiple longword
accesses before passing them to the I/O port. The dense space hose packets
can therefore accommodate up to eight longwords of data, with mask bits
to indicate which bytes are valid. The dense space packets support up to
32 bits of remote I/O bus address.
6.6.3 Hose Signals
Tables 6-10 and 6-11 list the signals of the Up Hose and the Down Hose,
respectively. The description of the hose signals follows the usual conven-
tion:
• PA<xx:5> - byte-aligned remote I/O bus address
• PA<4:3> - length of the transaction
• PA<2:0> - ignored
• High true signal
1=asserted=true=high= +5 V
• Low true signal
1=asserted=true=lo= 0 V
I/O Port 6-37
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