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Figure 6-26
Interlock Read Packet
UPD <31:0>
31
TAG<7:0>
1*
2
* = hose cycle
Table 6-27 gives the description of the IREAD packet.
Table 6-27 Interlock Read Packet Description
Field
Description
Clock 1, <31:24>
The TAG<7:0> field allows the subsequent DMA Read Data Return packet
on the Down Hose to be associated with an IREAD packet on the Up Hose.
The tag is generated by the I/O bus adapter.
Are always zero.
Clock 1, <23:11>
The length field indicates the length of the DMA Read packet. The packet
Clock 1, <10:8>
data length of an IREAD packet is always an octaword and the length code
for the octaword packet indicates that only a quadword of data is re-
quested. This length code is looped back through the DMA Read Data Re-
turn packet and allows the I/O bus adapter to use the length code to ex-
tract the correct quadword from the octaword DMA Read Data Return
packet. See Table 6-28 for the IREAD packet size.
NOTE: All IREADs from the XMI must be naturally aligned quadwords.
Therefore, the I/O port ignores the length field and assumes a quadword
length whenever it receives an IREAD command on the Up Hose.
ADR<39:32> of the target address. See definition below.
Clock 1, <7:0>
ADR<31:0> of the target address. See definition below.
Clock 2, <31:0>
naturally aligned to length (LEN) code of the data being requested.
NOTE: All IREADs must be naturally aligned quadwords. Therefore, the I/O port
ignores the length field and treats it as a quadword whenever it receives an
IREAD command on the Up Hose.
Table 6-28 Interlock Read Packet Size
6-56 I/O Port
24 23
0
ADR <31:0>
ADR<39:0> is the target address for the TLSB memory read. It must be
Length
Packet Data
Code
Length
Octaword
010
1 ADR<2:0> are ignored by the I/O port.
11 10
8
7
LEN
ADR <39:32>
Significant
1
Address Bits
ADR<39:3>
UPCTL
0
3
0
0 0 1 0
x x x x
BXB-0640-93
Data
Requested
Quadword
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