Table of Contents
Advertisement
TLMODCONFIG—CPU Module Configuration Register
Address
BB + 10C0
Access
R/W
The TLMODCONFIG register is set by console code to show the
module configuration.
31
Table 7-25 TLMODCONFIG Register Bit Definitions
Name
Bit(s)
RSVD
<31:20>
<19>
RSVD
<18>
FAULT_DIS
CPU_PIPE_DIS
<17>
<16>
SYS_PIPE_DIS
7-52 System Registers
19
18
17 16
RSVD
1
FAULT_DIS
CPU_PIPE_DIS
SYS_PIPE_DIS
BQ_MAX_ENT
CQ_MAX_ENT
BCIDLETIM: BC Idle Time
Type
Function
R/W, 0
Reserved. Must be written as zeros.
R/W, 1
Reserved. Must be written as one.
R/W, 0
Fault Disable. When set, disables the CPU module
from asserting TLSB_FAULT.
R/W, 0
CPU Pipe Disable. When set, disables the piping of
commands to the system from the CPUs.
R/W, 0
System Pipe Disable. When set, disables the piping
of commands to the CPUs from the system. Debug op-
tion only.
15
14 13
12
11
10 9
8
RM_SIZE
LOCKOUT_EN
BCACHE_SIZE
CPU1_DIS
CPU0_DIS
3
6
5
4
2
1
0
7
BXB-0785-93
Advertisement
Table of Contents
