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in strict first-come, first-served order. Any other writes to the TLMBPR
register by a CPU that already has two mailbox transactions pending is
NO ACKed. A further constraint is that only one mailbox transaction can
be processed by the I/O port at any time. All further mailbox transactions
in the TLMBPR queue are put on hold until the previous mailbox transac-
tion completes. Completion of a transaction is signaled by a mailbox
status packet returned to the I/O port by an I/O bus adapter.
When a CPU loads a TLMBPR register in the I/O port, the I/O port reads
the mailbox structure from memory, loads it into the read/merge buffer,
and transmits it on the Down Hose as a Mailbox Command packet.
Note that the I/O port forces bits <13> and <12> of the mailbox command
field to 10 binary, which is the hose code for a Mailbox Command packet.
Therefore, these bits have no meaning to software. This is the only modifi-
cation the I/O port makes to the Mailbox Command packet before trans-
mitting it on the Down Hose.
Eventually, the I/O port should receive a Mailbox Status Return packet on
the targeted Up Hose, which indicates that the Mailbox Command packet
has completed. Upon receiving the Mailbox Status Return packet, the I/O
port does a Read-Modify-Write operation to merge the Mailbox Status Re-
turn packet into the mailbox structure fetched from memory and writes
the results back to memory.
I/O Window Space Write Transactions
TLSB CSR writes mapped into the I/O port's I/O window space are trans-
lated into I/O window write command packets that are sent to the specified
Down Hose. This allows CSR and memory writes to occur on a remote bus
(that is, the PCI bus).
Once the window write command packet is sent down Turbo Vortex A (or
B) bus, the I/O port does a TLSB CSR broadcast write to the Window
Space Decrement Queue Counter Register (WSDQRn) and deallocates the
I/O window buffer that was used. This signals the other commanders on
the TLSB that an I/O window buffer has freed up and that the I/O port can
accept another I/O window space transaction command.
I/O Window Space Read Transactions
TLSB CSR reads mapped into the I/O port's I/O window space are trans-
lated into I/O window read command packets that are sent to the specified
Down Hose. This allows CSR and memory reads to occur on a remote bus
(that is, the PCI bus).
When the window read command packet is sent down the Turbo Vortex A
(or B) bus, the I/O port does a TLSB CSR broadcast write to the Window
Space Decrement Queue Counter Register (WSDQRn) and deallocates the
I/O window buffer that was used. This signals the other commanders on
the TLSB that an I/O window buffer has freed up and that the I/O port can
accept another I/O window space transaction command.
When the I/O port has been loaded with an error free window Read Data
Return packet from the Up Hose, the I/O port generates a TLSB CSR
(broadcast) write to the CSR Read Data Return Data Register in CSR
broadcast space. This returns the data for the I/O window read transac-
tion.
I/O Port 6-29
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