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DMA Masked Write with Data
The DMA Masked Write Packet is a request on the Up Hose from the I/O
bus adapter to the I/O port for a TLSB data write transaction.
Any combination of mask bits is allowed. However, the I/O bus adapter
may or may not support this capability. A mask bit is set to write the cor-
responding byte of data.
This packet is supported by the Mailbox Only, I/O Window, Full, and Mem-
ory Channel variants of the hose protocol. Figure 6-27 shows the DMA
Masked Write packet.
Figure 6-27
DMA Masked Write Packet
DND <31:0>
31
xxxx
1*
2
3
4
17
18
* = Clock cycle
Table 6-29 gives the description of the DMA Masked Write packet.
24 23
0
0 0 0 0 0 0 0 0 0 0 0 0
ADDRESS <31:0>
LWDATA1 <31:0>
LWDATA2 <31:0>
LWDATA15 <31:0>
LWDATA16 <31:0>
11 10
8
7
LEN
ADR <39:32>
UPCTL
3
0
0
0 1 1 1
x x x x
M<3:0>
M<3:0>
M<3:0>
M<3:0>
BXB-0645-93
I/O Port 6-57
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