Gbus$Whami; Gbus$Whami Register Bit Definitions - DEC AlphaServer 8200 Technical Manual

GBUS$WHAMI

Address FF C000 0000
Access R/W
The GBUS$WHAMI register provides node ID, CPU number, and
reflects the status of some backplane signals.
Table 7-36 GBUS$WHAMI Register Bit Definitions
Name Bit(s)
<7>
RSVD
<6>
MFG_MODE_L
<5>
TLSB_CONWIN
<4>
TLSB_BAD
<3:1>
NID
<0>
CPU_NUM
7 6
0
MFG_MODE_L
TLSB_CONWIN
TLSB _BAD
Type Function
R0 Reserved. Reads as zero.
R Manufacturing Mode Low. Tied to a center-
plane signal. Used by manufacturing to indicate
that the module is in a manufacturing environ-
ment.
R TLSB CONWIN. Reflects the inverted state of
the TLSB_CONWIN L backplane signal.
R TLSB BAD. Reflects the inverted state of the
TLSB_BAD L backplane signal.
R TLSB Node ID. Identifies which node this module
is in a TLSB system.
R, X CPU Number. Hardware responds with a 0 for
CPU0 and a 1 for CPU1.
5 4 3 1 0
CPU_NUM
NID
BXB-0514-93
System Registers 7-77