Dma Read Packet; Mailbox Status Return Packet Description - DEC AlphaServer 8200 Technical Manual

Table 6-24 Mailbox Status Return Packet Description
Field Description
The return data longword 0 and 1 fields, respectively. The return data
Clock 1 and 2,
fields contain read data in response to Mailbox Command packets that
<31:0>
were reads. This data is Unpredictable when responding to Mailbox Com-
mand packets that were writes.
Device specific field <29:0>. The device specific field contains operation
Clock 3, <31:2>
completion status. The interpretation of this field is defined by the I/O bus
adapter module.
The Error bit. If an error was detected by the I/O adapter, the Error bit
Clock 3, <1>
will be set.
The Done bit. This bit is always set in a mailbox return packet.
Clock 3, <0>
Device specific field <61:30>. The device specific field contains operation
Clock 4, <31:0>
completion status. The interpretation of this field is defined by the I/O bus
adapter.
DMA Read
The DMA Read packet is a request on the Up Hose from the I/O bus
adapter to the I/O port for a data read transaction on the TLSB bus.
The requested data for a DMA Read packet is returned on the Down Hose
with a DMA Read Data Return packet. Figure 6-25 shows the DMA Read
packet.
Figure 6-25

DMA Read Packet

UPD <31:0>
31
TAG<7:0>
1*
2
* = hose cycle
Table 6-24 gives the description of the DMA Read packet.
6-54 I/O Port
24 23
0
ADR <31:0>
11 10 8 7
LEN ADR <39:32>
UPCTL
0 3 0
0 0 0 1
x x x x
BXB-0278-92