Mcr Register Bit Definitions - DEC AlphaServer 8200 Technical Manual

Table 7-43 MCR Register Bit Definitions
Name Bit(s)
<31>
BAT
<30>
BDIS
<29>
BREN
<28>
BDC
<27:10>
RSVD
1 There is no initialized value. State is a direct read of the condition of the batteries. Valid only if bit <1> of this
register (DTYP) is a zero.
7-90 System Registers
Type Function
1
R, none Battery OK. Indicates the state of the batteries
when memory is configured to support the
SRAM (NVRAM) option. When set, the battery
supply is sufficient and present. When clear,
two possibilities exist. First, if the battery has
been disconnected through bit <30>, a zero will
indicate that the battery disable circuitry is
functioning properly. The second and foremost
function of this bit is to indicate that the battery
supply is sufficient to power the SRAMS in the
case of a power outage. If this bit is clear and bit
<28> is also clear, the battery must be re-
placed to guarantee proper operation during a
power outage.
W, 0 Battery Disable. This bit disconnects the bat-
tery supply from the SRAMS when battery
backup is not required. To disable the battery
supply, the user must write this bit twice
through successive CSR writes to this bit in this
register. If a write with bit <30> cleared to this
register is received after the first "write disable"
write, the function will fail and the battery will
not be disconnected. The user side I/O pin will
be forced to a zero when the battery is discon-
nected and forced to a one (set) during power-
up/reset states.
W, 0 Battery Reenable. When set, reenables the
battery supply after it has been disconnected
through writes to bit <30> during diagnostic
checking of NVRAM functions. It is not neces-
sary to write this bit to a one to enable the bat-
tery under power-up/reset states if Prestoserve
software left the battery enabled when a power-
fail occurred.
R, 0 Battery Disconnected. When set, this status
bit indicates that the user has disconnected the
battery supply through writes to bit <30>. It
will be clear on a power-up/reset state, or if the
user reenables the battery supply through a CSR
write to bit <29> of this register.
R0 Reserved. Read as zero.