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If the Error bit is set in the window Read Data Return packet, the I/O port
generates a TLSB CSR (broadcast) write to the CSR Read Data Return Er-
ror Register in CSR broadcast space. Data written is Unpredictable. The
flow is the same as in the normal case.
Extended NVRAM Write Transactions
The I/O port compares all extended NVRAM writes targeted to it against
its Down Hose Range registers. If a match occurs, the I/O port assembles a
Memory Channel write packet and transmits it to a remote I/O adapter on
the targeted Down Hose.
The Memory Channel write transaction is used to deliver a block of data,
along with its TLSB physical address, to the remote I/O bus. This transac-
tion is used to support Prestoserve NVRAM writes.
Flow control is maintained by a pair of Memory Channel queue counters in
each TLSB commander node. Each commander node increments its associ-
ated Memory Channel queue counters whenever it detects a memory write
on the TLSB with TLSB_ADR<4:3> having a nonzero value.
When the I/O port empties the extended NVRAM write from its internal
buffer, it issues a CSR write command to the Memory Channel Decrement
Queue Counter Register (TLRMDQRn) in CSR broadcast space. The I/O
port does not ACK the write broadcast nor does it generate the associated
data cycle. This causes each commander node to decrement its associated
Memory Channel queue counter. The I/O bus adapter acknowledges each
Memory Channel write packet with a window write status return packet.
The packet provides flow control.
When the I/O port receives a window Write Status Return packet on the
Up Hose, it decrements its remote adapter node buffer counters and dis-
cards the packet.
If the Memory Channel write address range does not fall within the range
of an associated valid outgoing Down Hose Range register, the I/O port dis-
cards the transaction and sets ICCNSE<3> (RMNXM). The I/O port then
generates an interrupt on IPL 17, if ICCNSE<31> (INTR_NSES) is set and
ICCMSR<5> (RMNXM_DSBL) is clear.
6.5.2 TLSB Arbitration
TLSB arbitration is performed over a set of ten priority lines. TLSB_ REQ
<7:0> are variable-priority lines that are assigned to nodes 7–0, respec-
tively. TLSB_REQ8_HIGH and TLSB_REQ8_LOW are fixed priority lines
that are assigned to node 8. Fairness among the commanders in nodes 0–7
is achieved through dynamic reallocation of priority levels of each request
line. At power-up, or following a reset sequence, the relative priority of
TLSB_REQ<7:0> is initialized according to the device's node ID.
Node 8 (I/O port specific) uses a different scheme from the other nodes.
The node 8 I/O port has available to it both the lowest (TLSB_REQ8_LOW)
and the highest (TLSB_REQ8_HIGH) priority levels. The I/O port in node
8 has four arbitration modes. These modes are described in the following
section.
6-30 I/O Port
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