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7.1
Register Conventions .................................................................................................... 7-1
7.2
Register Address Mapping ........................................................................................... 7-2
7.3
TLSB Registers ............................................................................................................. 7-4
TLDEV-Device Register ...................................................................................... 7-5
TLBER-Bus Error Register ................................................................................. 7-7
TLCNR-Configuration Register ........................................................................ 7-14
TLVID-Virtual ID Register ............................................................................... 7-19
TLMMRn-Memory Mapping Registers ............................................................ 7-21
TLFADRn-Failing Address Registers .............................................................. 7-24
TLESRn-Error Syndrome Registers ................................................................ 7-26
TLILIDn-Interrupt Level IDENT Registers .................................................... 7-30
TLCPUMASK-CPU Interrupt Mask Register ................................................. 7-31
TLMBPR-Mailbox Pointer Registers ................................................................ 7-32
TLIPINTR-Interprocessor Interrupt Register .................................................. 7-35
TLIOINTRn-I/O Interrupt Registers ............................................................... 7-36
TLWSDQR4-8-Window Space Decr Queue Counter Registers ....................... 7-38
TLRMDQRX-Memory Channel Decr Queue Counter Register X ................... 7-39
TLRMDQR8-Memory Channel Decr Queue Counter Register 8 .................... 7-40
TLRDRD-CSR Read Data Return Data Register ............................................. 7-41
TLRDRE-CSR Read Data Return Error Register ........................................... 7-42
TLMCR-Memory Control Register .................................................................... 7-43
7.4
CPU Module Registers ................................................................................................ 7-44
TLDIAG-Diagnostic Setup Register ................................................................. 7-47
TLDTAGDATA-DTag Data Register ................................................................ 7-50
TLDTAGSTAT-DTag Status Register .............................................................. 7-51
TLMODCONFIG-CPU Module Configuration Register ................................. 7-52
TLEPAERR- ADG Error Register .................................................................... 7-54
TLEPDERR-DIGA Error Register ................................................................... 7-57
TLEPMERR-MMG Error Register ................................................................... 7-59
TLEP_VMG-Voltage Margining Register ......................................................... 7-62
TLINTRMASK0-1-Interrupt Mask Registers ................................................. 7-63
TLINTRSUM0-1-Interrupt Source Registers ................................................. 7-65
TLCON00,01,10,11-Console Communications Regs ........................................ 7-68
TLCON0A,0B,0C,1A,1B,1C-DIGA Comm. Test Regs ...................................... 7-69
RM_RANGE_nA,B-Memory Channel Range Regs ........................................... 7-70
TLDMCMD-Data Mover Command Register ................................................... 7-72
TLDMADRA-Data Mover Source Address Register ........................................ 7-75
TLDMADRB-Data Mover Destination Address Reg ....................................... 7-76
GBUS$WHAMI ..................................................................................................... 7-77
GBUS$LED0,1,2 ................................................................................................... 7-78
GBUS$MISCR ...................................................................................................... 7-79
GBUS$MISCW ..................................................................................................... 7-81
GBUS$TLSBRST .................................................................................................. 7-82
GBUS$SERNUM .................................................................................................. 7-83
7.5
Memory-Specific Registers ......................................................................................... 7-85
SECR-Serial EEPROM Control/Data Register ............................................... 7-86
MIR-Memory Interleave Register .................................................................... 7-87
MCR-Memory Configuration Register .............................................................. 7-89
STAIR-Self-Test Address Isolation Register ................................................... 2-24
STER-Self-Test Error Register .......................................................................... 2-24
MER-Memory Error Register ............................................................................ 7-97
MDRA-Memory Diagnostic Register A ............................................................ 2-26
MDRB-Memory Diagnostic Register B ........................................................... 7-102
STDERA,B,C,D,E-Self-Test Data Error Registers ........................................ 7-103
ix
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