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Table 7-60 IDPNSE0–3 Register Bit Definitions (Continued)
Name
IDR_UP_VRTX_ERR
IDR_CMD_PAR_ ERR
RSVD
7-130 System Registers
Bit(s)
Type
Function
<26:25>
W1C, 0
IDR Up Vortex Error. This is a composite er-
ror field of possible Up Turbo Vortex errors
that the IDR gate arrays can detect in each of
the IDR0-3 data path gate arrays as follows:
There are two separate Up Turbo Vortex buses,
one for hose<3:2> and one for hose<1:0>.
An IPL 17 interrupt is generated when this bit
sets if interrupts are enabled by INTR_NSES
(ICCNSE<31>). The I/O port should be reset
if this error bit is set. The possible Up Turbo
Vortex errors are as follows:
<24>
W1C, 0
IDR Command Parity Error. Sets whenever
a parity error is detected on either the
TL_CMD<4:0> bus or CRM_CMD<2:0> bus.
This is a fatal error that causes the I/O port to
drive TLSB_FAULT.
<23:4>
R0
Reserved. Read as zeros.
IDR_UP_VRTX_ERR<1:0> in IDR-3 detects
Turbo Vortex errors detected by the IDR3
data path array
IDR_UP_VRTX_ERR<1:0> in IDR-2 detects
Turbo Vortex errors detected by the IDR2
data path array
IDR_UP_VRTX_ERR<1:0> in IDR-1 detects
Turbo Vortex errors detected by the IDR1
data path array
IDR_UP_VRTX_ERR<1:0> in IDR-0 detects
Turbo Vortex errors detected by the IDR0
data path array
IDR_UP_VRTX_ERR<1> detects errors on
Up-Turbo Vortex-B (hose<3:2>)
IDR_UP_VRTX_ERR<0> detects errors on
Up-Turbo Vortex-A (hose<1:0>)
Parity
Sequence error
Buffer overflow
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