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TLDTAGDATA—DTag Data Register
Address
BB + 1040
Access
R/W
Diagnostics test the DTag RAMs by writing a value to the DTag
and reading the value back to check that the two match. On diag-
nostic DTag writes, the TLDTAGDATA register is used to set up the
DTag data to be written. On diagnostic DTag reads, the TLDTAG-
DATA register is used to report the DTag data read from the DTag.
The TLDTAGDATA register also covers the DTag Data Parity bit.
Parity is not generated on the data written to the DTag, but is
checked on subsequent reads.
31
Table 7-23 TLDTAGDATA Register Bit Definitions
Name
RSVD
DTAG_DATA<38:20>
DTAG_DAT_PAR
7-50 System Registers
20
19
RSVD
Bit(s)
Type
Function
<31:20>
R/W, 0
Reserved. Must be written as zeros.
<19:1>
R/W, 0
DTag Data Entry. Data read from the DTag
entry associated with <DTCP>. When <DTRD>
is set, data is read at the index specified by the
DTag index of the next memory read. Valid only
when <FRIGN> is set.
If <DTWR> is set, the entry currently in this reg-
ister is written to the DTag entry subject to the
above qualifiers.
<0>
R/W, 0
DTag Data Parity. Subject to all the qualifiers
above, this is the data parity. Parity errors are
reported using the normal mechanism. Bad par-
ity can be written as this data does not go
through the DTag data parity generator.
DTAG_DATA<38:20>
DTAG_DAT_PAR
1
0
BXB-0755-93
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