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Table 7-5 TLCNR Register Bit Definitions (Continued)
Name
Bit(s)
<11:8>
VCNT
<7:4>
NODE_ID
DTOD
<3>
<2>
LKTOD
Type
Function
R/W, 0
Virtual Unit Count. This field indicates the
number of virtual units contained in this mod-
ule.
CPU: Self-test firmware loads this field with a
value of 1 on all uniprocessor modules and 2 on
all dual-processor modules.
Memory: Memory hardware loads this field with
a value of 1 on all single-bank modules, and 2 on
all two-bank modules.
I/O: I/O port hardware loads a value of 1 to this
field.
R, ID
Node ID. This field reflects the physical node
ID as presented to the node by TLSB_NID<2:0>.
I/O: An I/O node presented with
TLSB_NID<2:0> equal to zero presents a hex
value of 8 in the NODE_ID field.
R/W, 0
Data Timeout Disable. When set, a node
(CPU or I/O) disables the timeout counter for
TLSB_SEND_DATA. The error bit TL-
BER<DTO> does not set.
Memory: Reserved. Reads as zero.
R/W, 0
Bank Lock Timeout Disable. When set, a
memory node disables the timeout counter wait-
ing for a Bank Unlock Write command after
processing a Read Bank Lock command. The
<LKTO> error bit in the TLBER register will not
set.
CPU: Reserved. Reads as zero.
I/O: Reserved. Reads as zero.
System Registers 7-17
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