Tlsb Signal List; Tlsb Bus Signals - DEC AlphaServer 8200 Technical Manual

The TLSB implements parity checking on all address and command fields
on the address bus, ECC protection on the data field, and protocol se-
quence checking on the control signals across both buses.

2.1.5 TLSB Signal List

Table 2-1 lists the signals on the TLSB. Signal name, function, and de-
fault state are given. After initialization, the bus drives the default value
when idle.
Table 2-1

TLSB Bus Signals

Signal Name
TLSB_D<255:0>
TLSB_ECC<31:0>
TLSB_DATA_VALID<3:0>
TLSB_ADR<39:3>
TLSB_ADR_PAR
TLSB_CMD<2:0>
TLSB_CMD_PAR
TLSB_BANK_NUM<3:0>
TLSB_REQ8_HIGH
TLSB_REQ8_LOW
TLSB_REQ<7:0>
TLSB_HOLD
TLSB_DATA_ERROR
TLSB_FAULT
TLSB_SHARED
TLSB_DIRTY
TLSB_STATCHK
TLSB_CMD_ACK
TLSB_ARB_SUP
TLSB_SEND_DATA
TLSB_SEQ<3:0>
TLSB_BANK_AVL<15:0>
TLSB_LOCKOUT
TLSB_PH0
TLSB_NID<2:0>
TLSB_RSVD_NID<3>
TLSB_RESET
CCL_RESET L
TLSB_BAD L
TLSB_LOC_RX L
TLSB_LOC_TX L
TLSB_PS_RX L
Default
State Function
L 256-bit wide data bus
L Quadword ECC protection bits
L Data valid masks
L Physical memory address
L Address parity
L Command field
L Command and bank number parity
L Encoded bank number
L Slot 8 high priority bus request
L Slot 8 low priority bus request
L Normal bus requests
L Data bus stall
L Data bus error detected
L Bus fault detected
L Cache block is shared
L Cache block is dirty
L Check bit for shared and dirty
L Command acknowledge
L Arbitration disable
L Send data
L Sequence number
L Bank available lines
L Lockout
Clock
Node identification
Spare node identification
L Bus reset
H CCL reset
H Self-test not successful
H Local console receive data
H Local console transmit data
H Power supply receive status
TLSB Bus 2-3