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TLDTAGSTAT—DTag Status Register
Address
BB + 1080
Access
R/W
Diagnostics test the DTag status RAMs by writing a value to
<DT_STAT> and reading the value back to check that the two
match. On diagnostic DTag writes, the TLDTAGSTAT register is
used to set up the <DT_STAT> value to be written. On diagnostic
DTag reads, the TLDTAGSTAT register is used to report the
<DT_STAT> value read from the DTag. This register also has a
DTag Status Parity bit. Parity is not generated on data written to
the DTag, but is checked on subsequent reads.
31
Table 7-24 TLDTAGSTAT Register Bit Definitions
Name
Bit(s)
<31:4>
RSVD
<3:1>
DT_STAT_(V,S,D)
<0>
DT_STAT_PAR
RSVD
Type
Function
R/W, 0
Reserved. Must be written as zeros.
R/W, 0
DTag Status (Valid, Shared, Dirty). Status
read from the DTag entry associated with <DTCP>,
when <DTRD> is set at the index specified by the
DTag index of a memory read, when <FRIGN> is
set and is loaded into the appropriate bits in this
register. If <DTWR> is set, then the entry cur-
rently in this register is written to <DTAG_STAT
(V,S,D)> subject to the above qualifiers.
R/W, 0
DTag Status Parity. Subject to all the qualifiers
above, this is the <DTAG_STAT> parity. Parity er-
rors are reported using the normal mechanism un-
less the latter is disabled. Bad parity can be writ-
ten because this data does not go through the
<DTAG_STAT> parity generator.
4
DT_STAT_V
DT_STAT_S
DT_STAT_D
DT_STAT_PAR
BXB-0777-93
System Registers 7-51
3
2
1
0
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