Window Space Mapping - DEC AlphaServer 8200 Technical Manual

port receives a Window Status Return packet on the Up Hose, it decre-
ments that hose's counter. The I/O port does not transmit window
read/write command packets on the Down Hose when that hose's counter
equals zero. Thus, the I/O adapter's Down Hose window FIFO never over-
flows.
DMA Read Data Return packets are a result of DMA read packets trans-
mitted by the I/O adapter on the Up Hose. Therefore, if the I/O adapter
always reserves a Down Hose FIFO to receive the resulting DMA Read
Data Return packet for every DMA read packet it transmits on the Up
Hose, its Down Hose FIFO will never overflow.
INTR/IDENT Status Return packets are a result of INTR/IDENT packets
transmitted by the I/O adapter on the Up Hose. Therefore, if the I/O
adapter always reserves a Down Hose FIFO to receive the resulting INTR/
IDENT Status Return packet for every INTR/IDENT packet it transmits
on the Up Hose, its Down Hose FIFO will never overflow.
The advantage of this Down Hose protocol is that the I/O port can transmit
packets on the Down Hose as fast as it is capable, thus maximizing the
overall Down Hose performance.
The Up Hose is flow controlled through the DECPKTCNT (Decrement
Packet Count) signal. The I/O bus adapter module keeps count of how
many packets it has transmitted across the Up Hose at any given time.
The I/O bus adapter must know how many packets it can send before the
I/O port's buffers are filled. All I/O bus adapters allow this limit to be pro-
grammable.
Each time the I/O port removes an Up Hose packet from its buffer, it as-
serts DECPKTCNT for one Down Hose cycle. The I/O adapter module uses
this signal to decrement its packet counter so that it can keep a running
count of how many free buffers there are in the I/O port at any given time.
As long as the count is less than the limit, the I/O bus adapter module can
transmit an Up Hose packet.
The advantage of this Up Hose protocol is that it avoids the round trip de-
lay of acknowledeging each packet before the next one can be sent.
On both the Up Hose and the Down Hose, once a packet transmission is
started, longwords must be transmitted over the hose contiguously, until
the last longword of the packet has been transmitted. Deassertion of the
Data Valid signal marks the end of the packet. Idle cycles or any interrup-
tion of the data flow that occurs before the end of the packet results in a
sequence error for that packet.

6.6.2 Window Space Mapping

The hose provides two sets of protocol packets to support direct CPU access
to I/O bus address space. The concept of sparse and dense address
mappings is used in the hose protocol to accommodate the PCI bus, which
supports byte and word accesses, and multiple distinct address spaces.
The additional protocol provides the CPU with multiple windows into the
PCI address spaces, using sparse and dense type protocol packets as ap-
propriate.
Three windows are defined for a sparse mapping, and one window for
dense mapping.
6-36 I/O Port