Tlber Register Bit Definitions - DEC AlphaServer 8200 Technical Manual

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Table 7-4

TLBER Register Bit Definitions

Name
Bit(s)
<31>
DTO
<30>
DSE
<29>
SEQE
<28>
DCTCE
ABTCE
<27>
UACKE
<26>
<25>
FDTCE
<24>
DTDE
7-8 System Registers
Type
Function
W1C, 0
Data Timeout. Set when a commanding node
times out waiting for a slave to assert
TLSB_SEND_DATA. This is a system fatal er-
ror that asserts TLSB_FAULT. This error is dis-
abled if TLCNR<DTOD> is set.
Memory: Not implemented.
W1C, 0
Data Status Error. Set when
TLSB_STATCHK does not match the logical OR
of TLSB_SHARED and TLSB_DIRTY. This is a
system fatal error that asserts TLSB_FAULT.
W1C, 0
Sequence Error. Set when an unexpected
value of TLSB_SEQ<3:0> is received. This is a
system fatal error that asserts TLSB_FAULT.
W1C, 0
Data Control Transmit Check Error. Set
when a transmit check error is detected on
TLSB_SEND_DATA, TLSB_SEQ<3:0>,
TLSB_SHARED, TLSB_DIRTY, TLSB_HOLD,
TLSB_STATCHK, or TLSB_DATA_ERROR sig-
nals. This is a system fatal error that asserts
TLSB_FAULT.
I/O: Does not drive TLSB_SHARED,
TLSB_DIRTY, and TLSBSTACHK.
W1C, 0
Address Bus Transmit Check Error. Set
when a transmit check error is detected on
TLSB_ARB_SUP, TLSB_LOCKOUT, or
TLSB_BANK_AVL<15:0> signals. This is a sys-
tem fatal error that asserts TLSB_FAULT.
I/O: Does not drive TLSB_LOCKOUT or
TLSB_BANK_AVL<15:0>.
W1C, 0
Unexpected Acknowledge. Set if a node re-
ceives unexpected TLSB_CMD_ACK. This is a
system fatal error that asserts TLSB_FAULT.
W1C, 0
Fatal Data Transmit Check Error. Set when
a node detects a data transmit check error and
does NOT detect any ECC error. This is a sys-
tem fatal error that asserts TLSB_FAULT.
Data Transmitter During Error. A status bit
set on receipt of TLSB_DATA_ERROR if node
was the transmitter of the data during data bus
transaction.

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