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7.2 Register Address Mapping
CSRs are mapped to a node space as offsets from a base address that is
assigned to the node (slot on the TLSB backplane). The base address is
implemented in hardware and depends on the node ID of the module,
which is determined by the TLSB slot occupied by the module.
Table 7-1 gives the physical base addresses of nodes on the TLSB bus.
Some registers are mapped to the broadcast space. The broadcast space
base address (BSB) is common to all nodes and is FF 8E00 0000.
7-2 System Registers
• When the value of a bit position is given explicitly in a register dia-
gram, the information conveyed is as follows:
Bit Value
Designation
0
1
X
• The entry in the type column of a register description table may in-
clude the initialization value of the bits. For example, entry "R/W, 0"
indicates a read/write bit that is initialized to 0.
• Acronyms are used throughout register descriptions to indicate the ac-
cess type of the bit(s) as follows:
Acronym
Access Type
R
Read only; writes ignored.
Read as zero.
R0
Read/write.
R/W
Undefined
U
Write only.
W
Read/write one to clear; unaltered by a write of zero.
W1C
Write one to set; self-cleared; cannot be cleared by a
W1S
write of zero.
Meaning
Reads as zero; ignored on writes.
Reads as one; ignored on writes.
Does not exist in hardware. The value of the
bit is Unpredictable on reads and ignored on
writes.
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