Register Descriptions; Base Registers - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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15.3.1 Register Descriptions

15.3.1.1 BASE REGISTERS. The base registers (BR0-7) contain the base address and
address types that are used by the memory controller to compare the address bus with the
current address accessed. It also includes a memory attribute and selects the machine for
memory operation handling. After reset, BR0 is referred to as the Boot BR0 and it has a
special functionality until the first write to OR0.
BOOT BR0
BIT
0
1
2
FIELD
RESET
R/W
ADDR
BIT
16
17
18
FIELD
BA
AT
RESET
0
0
R/W
R/W
R/W
ADDR
*
This value depends on the value of the hard reset configuration word.
BR x
BIT
0
1
2
FIELD
RESET
R/W
ADDR
(IMMR & 0xFFFF0000) + 0x100 (BR0), 0x108 (BR1), 0x110, (BR2), 0x118 (BR3), 0x120 (BR4), 0x128 (BR5), 0x130 (BR6), 0x138 (BR7)
BIT
16
17
18
FIELD
BA
AT
RESET
0
0
R/W
R/W
R/W
ADDR
(IMMR & 0xFFFF0000) + 0x102 (BR0), 0x10A (BR1), 0x112, (BR2), 0x11A (BR3), 0x122 (BR4), 0x12A (BR5), 0x132 (BR6), 0x13A (BR7)
MOTOROLA
3
4
5
6
7
(IMMR & 0xFFFF0000) + 0x100
19
20
21
22
23
PS
PARE
WP
*
0
0
R/W
R/W
R/W
(IMMR & 0xFFFF0000) + 0x102
3
4
5
6
7
19
20
21
22
23
PS
PARE
WP
0
0
0
R/W
R/W
R/W
MPC823e REFERENCE MANUAL
8
9
10
11
BA
0
R/W
24
25
26
27
MS
RESERVED
0
R/W
8
9
10
11
BA
0
R/W
24
25
26
27
MS
RESERVED
0
R/W
Memory Controller
12
13
14
15
28
29
30
31
V
*
0
R/W
R/W
12
13
14
15
28
29
30
31
V
0
0
R/W
R/W
15-9

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