Motorola MPC823e Reference Manual page 617

Microprocessor for mobile computing
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For synchronous communication, the internal clock is identical to the baud rate output. To
get the preferred rate, you can select the appropriate system clock according to the following
equation:
sync baud rate =
To get a rate of 64kbps, the system clock can be 24.96MHz, DIV16 = 0, and the clock
divider = 389.
16.9 THE SERIAL COMMUNICATION CONTROLLERS
The MPC823e has two serial communication controllers (SCC2 and SCC3) that can be
configured independently to implement different protocols. They can be used to implement
bridging functions, routers, gateways, and interface with a wide variety of standard WANs,
LANs, and proprietary networks. The serial communication controllers have many physical
interface options, such as interfacing to TDM buses, ISDN buses, and standard modem
interfaces.
The serial communication controllers does not include the physical interface, but it is the
logic that formats and manipulates the data obtained from the physical interface. That is why
the serial interface is described in a different section. The protocol you choose is
independent of your physical interface preference. The serial communication controllers are
described in terms of the protocol that you choose to run. When a serial communication
controller is programmed to implement a certain protocol or mode, a certain level of
functionality is associated with that protocol. For most protocols, this corresponds to the
different parts of the link layer. Many functions of the serial communication controllers are
common to each of the following protocols:
• UART controller
• HDLC controller
• HDLC bus controller
• AppleTalk/LocalTalk controller
• Asynchronous HDLC controller
• IrDA controller (SCC2 only)
• Transparent controller
• Ethernet controller
Although the selected protocol usually applies to the SCCx transmitter and receiver, half of
a serial communication controller can run in transparent mode, while the other half runs the
standard protocol.
MOTOROLA
(BRGCLK, CLK2 or CLK4) ÷ (clock divider + 1) ÷
(1 or 16 according to the DIV16 bit)
MPC823e REFERENCE MANUAL
Communication Processor Module
16-163

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