Motorola MPC823e Reference Manual page 608

Communication Processor Module
10. SISTR and SIRP do not need to be read, but can be used for debugging information
once the channels are enabled.
11. Enable SCC2 for HDLC operation (to handle the LAPD protocol of the D channel). Set
SMC1 for SCIT operation. Set SMC2 for transparent operation.
16.7.8 Nonmultiplexed Serial Interface Configuration
The serial interface supports a nonmultiplexed serial interface (NMSI) mode for the serial
communication controllers and serial management controllers. The SICR decides whether
to connect SCCx to the NMSI and the SIMODE register decides whether to connect a serial
management controller to the NMSI. The serial communication controllers or serial
management controllers can be connected to the NMSI, regardless of the other channels
connected to a TDM channel. You must keep in mind, however, that NMSI pins can be
multiplexed with other functions at the parallel I/O lines. Therefore, if some combination of
the TDM and NMSI channels is used, you must consult the MPC823e pinout in
Section 2 External Signals to decide if (and where) you plan to connect a serial
communication controller or serial management controller.
The clocks that are provided to the universal serial bus, serial communication controllers,
and serial management controllers are derived from six sources—four internal baud rate
generators and four external CLK pins. There are two main advantages to this
bank-of-clocks approach. First, a universal serial bus, serial communication controller, or
serial management controller is not forced to choose its clock from a predefined pin or baud
rate generator, which adds flexibility to the pinout mapping strategy. Second, if a group of
SMC receivers and transmitters need the same clock rate they can share the same pin,
which leaves other pins available for other functions and minimizes the potential skew
between multiple clock sources.
The four baud rate generators also make their clocks available to external logic, regardless
of whether they are being used by a serial communication controllers or serial management
controller. The BRGOx pins are multiplexed with other functions, so all BRGO x pins may not
always be available. For more information, see the pinout in Section 2 External Signals .
The bank-of-clocks mapping has one restriction—the SMC transmitter must have the same
clock source as the receiver when connected to the NMSI pins.
Once the clock source is selected, the clock is given an internal name. For the serial
communication controllers, the clocks are called RCLK2 and TCLK2 and for the serial
management controllers, they are called SMCLK1 and SMCLK2. These internal names are
used only in NMSI mode to specify the clock that is sent to the serial communication
controller or serial management controller. These names do not correspond to any pins on
the MPC823e.
Note: The internal RCLK2 and TCLK2 can be used as inputs to the DPLL unit, which
is inside the serial communication controllers. Thus, the RCLK2 and TCLK2
clocks are not always required to reflect the actual bit rate on the line.
16-154 MPC823e REFERENCE MANUAL MOTOROLA