Motorola MPC823e Reference Manual page 837

Communication Processor Module
Each serial management controller supports the circuit interface and monitor channels of
the GCI bus. In which case, the serial management controller is connected to a TDM
channel in the serial interface. For testing purposes, the serial management controllers
support loopback and echo modes. The SMCx receiver and transmitter are double-buffered,
which provides an effective FIFO size (latency) of two characters. Refer to
Section 16.7 The Serial Interface with Time-Slot Assigner for details about configuring
the GCI interfaces.
U-BUS
CONTROL SYNC
CONTROL
REGISTERS
CLOCK
LOGIC
PERIPHERAL BUS
RX DATA TX DATA
REGISTER REGISTER
RXDx
SHIFTER TXDx
SHIFTER
Figure 16-115. Serial Management Controller Block Diagram
The receive data source for the two serial management controller channels have different
pin options for each channel. SMC1 can either use the L1RXDx pin of the serial interface or
the SMRXD1 pin if it is connected to the NMSI. SMC2 can also use the L1RXDx pin of the
serial interface, but if you use the SMRXD2 pin the serial interface time-slot assigner
function is not available. Likewise, the transmit data source for SMC1 can be the L1TXDx
pin if a serial management controller is connected to a TDM or the SMTXD1 pin if it is
connected to the NMSI. SMC2 transmit data source can also be L1TXDx pin if the serial
management controller is connected to a TDM, but if you use the SMTXD2 pin, the serial
interface time-slot assigner function is not available.
If the serial management controllers are connected to a TDM, the SMCx receive and
transmit clocks can be independent from each other, as defined in the CRTx bit of the
SIMODE register. Refer to Section 16.7.5.2 Serial Interface Mode Register for more
information. However, if a serial management controller is connected to the NMSI, the SMCx
receive and transmit clocks must be connected to a single clock source called SMCLK,
which is an internal signal name for a clock that is generated from the bank of clocks.
SMCLK originates from an external pin or one of the two internal baud rate generators. Refer
to Section 16.7.8 Nonmultiplexed Serial Interface Configuration for more details.
MOTOROLA MPC823e REFERENCE MANUAL 16-383