Motorola MPC823e Reference Manual page 106

Clocks and Power Control
DFNH—Division Factor High Frequency
This field sets the VCOOUT frequency division factor for general system clocks to be used
in normal mode. In normal mode, the MPC823e automatically switches to the DFNH
frequency. To select the DFNH frequency, load this field with the divide value and clear the
CSRC bit. A loss-of-lock condition will not occur when you change the value of this field. This
field is cleared by a power-on or hard reset.
000 = Divide by 1.
001 = Divide by 2.
010 = Divide by 4.
011 = Divide by 8.
100 = Divide by 16.
101 = Divide by 32.
110 = Divide by 64.
111 = Reserved.
DFLCD—Division Factor of LCDCLK
This field sets the VCOOUT frequency division factor for the LCDCLK signal. The total
division factor of DFALCD and this field must not exceed 64, as defined in
Section 5.3.4.4 The LCD Clocks . A loss-of-lock condition does not occur when you change
the value of this field. This field is cleared by a power-on or hard reset.
000 = Divide by 1.
001 = Divide by 2.
010 = Divide by 4.
011 = Divide by 8.
100 = Divide by 16.
101 = Divide by 32.
110 = Divide by 64.
111 = Reserved.
DFALCD—Division Factor of LCDCLK50
This field sets the LCDCLK frequency division factor for the LCDCLK50 signal. The
LCDCLK50 signal is input to the LCD panel. The total division factor of DFLCD and this field
must not exceed 64, as defined in Section 5.3.4.4 The LCD Clocks . Changing the value of
this field does not result in a loss-of-lock condition. This field is cleared by a power-on or
hard reset.
00 = Divide by 1.
01 = Divide by 3.
10 = Divide by 5.
11 = Divide by 7.
5-6 MPC823e REFERENCE MANUAL MOTOROLA