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Communication Processor Module
16.9.18.4 PROGRAMMING THE SCCS IN APPLETALK MODE. You can implement the
SCCx AppleTalk controller by setting certain bits in the SCCx HDLC controller. Otherwise,
you must consult Section 16.9.17 The HDLC Bus Controller for detailed information about
how to program the SCCx HDLC controller. You can use a serial communication controller
GSMR, PSMR, or TODR to program the AppleTalk controller.
Use the general SCCx mode high and low registers (GSMR_x) described in
Section 16.9.2 The General SCCx Mode Registers to program the AppleTalk controller
with the following steps:
1. Set the MODE field in the GSMR_L to AppleTalk.
2. Set the ENT and ENR bits in the GSMR_L.
3. Set the DIAG field in the GSMR_L for normal operation, with the CDx and CTSx pins
grounded or configured for parallel I/O. This causes CDx and CTSx to be internally
asserted to a serial communication controller.
4. Set the RDCR and TDCR fields in the GSMR_L to a 16× clock.
5. Set the TENC and RENC fields in the GSMR_L to FM0.
6. Set the TEND bit in the GSMR_L to 0.
7. Set the TPP field in the GSMR_L to 11.
8. Set the TPL field to 000 to transmit the next frame with no synchronization sequence
and to 001 to transmit the next frame with the LocalTalk synchronization sequence.
For example, data frames do not require a preceding synchronization sequence. This
field may be modified on-the-fly if the AppleTalk protocol is selected.
9. Set the TINV and RINV bits in the GSMR_L to zero.
10. Set the TSNC field in the GSMR_L to 10.
11. Set the EDGE field to 0.
12. Set the RTSM bit in the GSMR_H to 0.
13. Set all other bits to 0 or default.
Use the SCCx protocol-specific mode register described in Section 16.9.3 Protocol-
Specific Mode Register to program the AppleTalk controller with the following steps:
1. Set the NOF field to 0001 (binary) giving two flags before frames (one opening flag and
one additional flag).
2. Set the CRC field to 16-bit CRC-CCITT.
3. Set the DRT bit to 1.
4. Set all other bits to 0 or default.
Use the transmit-on-demand register described in Section 16.9.5 Transmit-on-Demand
Register to expedite a transmit frame by setting the TOD bit to 1.
16-268
MPC823e REFERENCE MANUAL
MOTOROLA
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