Bus Request Signal - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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External Bus Interface
Figure 13-20 illustrates the basic protocol for bus arbitration. For more information, see
Section 12.12.1.1 SIU Module Configuration Register.
REQUESTING DEVICE
REQUEST THE BUS
1. ASSERT BR
ACKNOWLEDGE BUS MASTERSHIP
1. WAIT FOR BB TO BE
2. ASSERT BB TO BECOME NEXT
MASTER
3. NEGATE BR
OPERATE AS BUS MASTER
1. PREFORM DATA TRANSFER
RELEASE BUS MASTERSHIP
1. NEGATE BB
Figure 13-20. Bus Arbitration Flowchart
13.4.6.1 BUS REQUEST SIGNAL. The potential bus master asserts the BR signal to
request bus mastership. BR must be negated once the bus is granted, the bus is not busy,
and the new master can drive the bus. If more requests are pending, the master can keep
asserting its bus request as long as needed. When configured for external central
arbitration, the MPC823e drives this signal when it needs bus mastership. When the internal
on-chip arbiter is used, this signal is an input to the internal arbiter and must be driven by
the external bus master.
13-28
1. ASSERT BG
NEGATED
1. NEGATE BG (MAY CHOOSE TO
KEEP IT ASSERTED TO PARK
BUS MASTER)
MPC823e REFERENCE MANUAL
ARBITER
GRANT BUS ARBITRATION
TERMINATE ARBITRATION
MOTOROLA

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