Motorola MPC823e Reference Manual page 932

Communication Processor Module
16.14.1 Features
The following is a list of the parallel I/O port's main features:
• Port A is 12 Bits
• Port B is 16 Bits
• Port C is 12 Bits
• Port D is 13 Bits
• All Ports are Bidirectional
• All Ports have Alternate On-Chip Peripheral Functions
• All Ports are Three-Stated at System Reset
• All Pin Values can be Read while the Pin is Connected to an On-Chip Peripheral
• Ports A and B have Open-Drain Capability
• Port C has 12 Interrupt Input Pins
16.14.2 Port A Pin Functionality
The 12 port A pins are independently configured as general-purpose I/O pins if the
corresponding bit in the port A pin assignment register (PAPAR) is cleared. On the other
hand, each pin is configured as a dedicated on-chip peripheral pin if the corresponding
PAPAR bit is set. When the port A pin is configured as a general-purpose I/O pin, the signal
direction for that pin is determined by the corresponding control bit in the port A data
direction register (PADIR). The port A pin is configured as an input if the corresponding
PADIR bit is cleared and configured as an output if the corresponding bit is set. All PAPAR
and PADIR bits are cleared at system reset, which configures all port A pins as
general-purpose input pins.
16-478 MPC823e REFERENCE MANUAL MOTOROLA