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External Bus Interface
Furthermore, for all inputs, the MPC823e latches the level of the input during a sample
window around the rising edge of the clock signal. This window is illustrated in Figure 13-1,
where tsu and tho are the input setup and hold times, respectively. To ensure that an input
signal is recognized on a specific falling edge of the clock, the input must be stable during
the sample window. If an input makes a transition during the window time period, the level
recognized by the MPC823e is not predictable. However, the MPC823e always resolves the
latched level to either a logic high or low before using it. In addition to meeting input setup
and hold times for deterministic operation, all input signals must obey the protocols
described in this section.
tho
tsu
CLOCK
SIGNAL
SAMPLE
WINDOW
Figure 13-1. Input Sample Window
13-2
MPC823e REFERENCE MANUAL
MOTOROLA
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