Real-Time Clock Status And Control Register - Motorola MPC823e Reference Manual

System Interface Unit

12.7.1 Real-Time Clock Status and Control Register

The real-time clock status and control (RTCSC) register is used to enable the different
real-time clock functions and for reporting the source of the interrupts. A status bit is cleared
by writing a 1 (writing a zero has no effect) and more than one status bit can be cleared at
a time. This register can be read at any time.
RTCSC
BIT 0 1 2
FIELD
RESET
R/W
ADDR
NOTE: — = Undefined.
RTCIRQ—Real-Time Clock Interrupt Request
This field controls the real-time clock's interrupt priority level.
SEC—Once Per Second Interrupt
This status bit is set every second and must be cleared by the software.
ALR—Alarm Interrupt
This status bit is set when the value of the real-time clock is equal to the value programmed
in the RTCAL register.
Bit 10—Reserved
This bit is reserved and must be set to 0.
38K—Real-Time Clock Source Select
The software must set this bit to get the proper timing of a second.
0 = Assumes that it is driven by a 32.768kHz crystal
1 = Assumes that it is driven by a 38.4kHz crystal.
SIE—Seconds Interrupt Enable
This bit allows the real-time clock to generate an interrupt when the SEC bit is set.
0 = Disables seconds interrupt.
1 = The real-time clock generates an interrupt.
12-18
3 4 5 6 7
RTCIRQ SEC
0
R/W R/W
(IMMR & 0xFFFF0000) + 0x220
MPC823e REFERENCE MANUAL
8 9 10 11 12
ALR RES 38K SIE ALE
0 0 0 — 0
R/W R/W R/W R/W R/W
13 14 15
RTF RTE
0 0 —
R/W R/W
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