Memory Map - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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SECTION 3

MEMORY MAP

This section discusses the internal memory map (including key registers) of the MPC823e.
Each memory resource is mapped within a contiguous block of 16K storage. The location of
this block within the global 4G real storage space can be mapped on 64K resolution through
an implementation specific special register called the internal memory map register (IMMR).
Refer to Section 12.12.1.2 Internal Memory Map Register for more information.
Table 3-1. MPC823e Internal Memory Map
INTERNAL
ADDRESS
SYSTEM INTERFACE UNIT
000
SIUMCR—SIU Module Configuration Register
004
SYPCR—System Protection Control Register
008 to 00D
RES—Reserved
00E
SWSR—Software Service Register
010
SIPEND—SIU Interrupt Pending Register
014
SIMASK—SIU Interrupt Mask Register
018
SIEL—SIU Interrupt Edge/Level Register
01C
SIVEC—SIU Interrupt Vector Register
020
TESR—Transfer Error Status Register
024 to 02F
RES—Reserved
030
SDCR—SDMA Configuration Register
034 to 07F
RES—Reserved
PCMCIA
080
PBR0—PCMCIA Interface Base Register 0
084
POR0—PCMCIA Interface Option Register 0
088
PBR1—PCMCIA Interface Base Register 1
08C
POR1—PCMCIA Interface Option Register 1
090
PBR2—PCMCIA Interface Base Register 2
094
POR2—PCMCIA Interface Option Register 2
098
PBR3—PCMCIA Interface Base Register 3
MOTOROLA
REGISTER
MPC823e REFERENCE MANUAL
SIZE
PAGE NUMBER
(IN BITS)
LOCATION
32
12-30
32
12-35
16
12-27
32
12-7
32
12-8
32
12-9
32
12-10
32
12-36
32
16-85
32
17-16
32
17-17
32
17-16
32
17-17
32
17-16
32
17-17
32
17-16
3-1

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