Motorola MPC823e Reference Manual page 87

Microprocessor for mobile computing
Table of Contents

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Table 3-1. MPC823e Internal Memory Map (Continued)
INTERNAL
ADDRESS
SERIAL PERIPHERAL INTERFACE
AA0
SPMODE—SPI Mode Register
AA2
RES—Reserved
AA6
SPIE—SPI Event Register
AA7 to AA9
RES—Reserved
AAA
SPIM—SPI Mask Register
AAB
RES—Reserved
AAD
SPCOM—SPI Command Register
AAE to AB7
RES—Reserved
PORT B
AB8
PBDIR—Port B Data Direction Register
ABC
PBPAR—Port B Pin Assignment Register
AC0
PBODR—Port B Open-Drain Register
AC4
PBDAT—Port B Data Register
SERIAL INTERFACE
AE0
SIMODE—Serial Interface Mode Register
AE4
SIGMR—Serial Interface Global Mode Register
AE5
RES—Reserved
AE6
SISTR—Serial Interface Status Register
AE7
SICMR—Serial Interface Command Register
AE8 to AEB
RES—Reserved
AEC
SICR—Serial Interface Clock Route Register
AF0
SIRP—Serial Interface RAM Pointer Register
AF4 to AFF
RES—Reserved
SPECIALIZED RAM
B00 to BFF
VCRAM—Video Controller RAM Array
C00 to DFF
SIRAM—Serial Interface RAM
E00 to FFF
LCOLR—LCD Color RAM
1000 to 1FFF
RES—Reserved
MOTOROLA
REGISTER
MPC823e REFERENCE MANUAL
Memory Map
SIZE
PAGE NUMBER
(IN BITS)
LOCATION
16
16-443
16
8
16-452
8
16-453
16
8
16-451
32
16-488
32
16-489
32
16-485
32
16-487
32
16-129
8
16-128
8
8
16-140
8
16-139
32
16-136
32
16-141
256 bytes
19-16
512 bytes
16-122
512 bytes
18-30
3-11

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