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Communication Processor Module
A definition of the parameter RAM is contained in each protocol subsection that describes
the device using a parameter RAM. For example, in some locations the Ethernet parameter
RAM memory map is defined in the same way that the HDLC-specific parameter RAM is
defined.
IMMR + 0x3C00
IMMR + 0x3D00
IMMR + 0x3E00
IMMR + 0x3F00
NOTE: DPRAM_Base = (IMMR & 0xFFFF0000) + 0x2000.
* 0x1da3 for Ethernet.
†
0x1ea3 for SCC3 Ethernet.
16-16
Table 16-3. Parameter RAM Memory Map
PAGE
1
DPRAM_Base+ 0x1c00
DPRAM_Base+ 0x1c7f
DPRAM_Base+ 0x1c80
DPRAM_Base+ 0x1caf
DPRAM_Base+ 0x1cb0
DPRAM_Base+ 0x1cbf
DPRAM_Base+ 0x1cc0
DPRAM_Base+ 0x1cff
2
DPRAM_Base+ 0x1d00
DPRAM_Base+ 0x1d7f*
DPRAM_Base+ 0x1d80
DPRAM_Base+ 0x1daf
DPRAM_Base+ 0x1db0
DPRAM_Base+ 0x1dbf
DPRAM_Base+ 0x1dc0
DPRAM_Base+ 0x1dff
3
DPRAM_Base+ 0x1e00
DPRAM_Base+ 0x1e7f
DPRAM_Base+ 0x1e80
DPRAM_Base+ 0x1ebf
DPRAM_Base+ 0x1ec0
DPRAM_Base+ 0x1eff
4
DPRAM_Base+ 0x1f00
DPRAM_Base+ 0x1f7f
DPRAM_Base+ 0x1f80
DPRAM_Base+ 0x1fbf
DPRAM_Base+ 0x1fc0
DPRAM_Base+ 0x1fff
MPC823e REFERENCE MANUAL
ADDRESSES
PERIPHERAL
†
USB
2
I
C
MISC
IDMA1
SCC2
SPI
Timers
IDMA2
SCC3
SMC1
DSP1
Reserved
SMC2
DSP2
MOTOROLA
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