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Communication Processor Module
16.2.6.4.2 RISC Timer Table Entries. The 16 timers are located in the block of memory
that TM_BASE points to and each timer occupies 4 bytes. The first half-word forms the initial
value of the timer written when the SET TIMER command is executed. The next half-word
is the current value of the timer that gets decremented until it reaches zero. You must not
modify these locations because they must only be used for debugging purposes.
16.2.6.4.3 The SET TIMER Command. This command is issued to the CPCR and is used
to enable, disable, and configure the 16 timers in the RISC timer table. The 0x0851 value
must be written to the CPCR, but, first, you must set up the TM_CMD value.
16.2.6.4.4 PWM Mode. Each pair of timers can be used to generate a pulse-width
modulation waveform on one of the port B pins. A maximum of six channels are supported.
The first timer (which is even-numbered) is used to control the duty-cycle time of the
waveform. In the register above, the TIMER PERIOD entry must be set to the high period of
the waveform and the PWM and V bits must be set to 1. The second timer (which is odd-
numbered) is used to control the cycle time. The TIMER PERIOD entry must be set to the
preferred cycle time, the PWM bit must be set to zero, and the R and V bits must be set to
1. Table 16-5 shows the port B pin assignments for the PWM mode. The respective port B
pins must be configured as general-purpose outputs in the PBDIR, which is described in
Section 16.14.6.3 Port B Data Direction Register. Because the CPM has to read the data
register, modify it and then write it back, you cannot use open drain output with the PWMs
if the output can be forced to 0 by external devices.
16-22
Table 16-5. PWM Channel Pin Assignments
TIMER PAIRS
0 and 1
2 and 3
4 and 5
6 and 7
8 and 9
10 and 11
12 and 13
14 and 15
MPC823e REFERENCE MANUAL
PORT B PIN
PB23
PB22
Not Available
Not Available
PB19
PB18
PB17
PB16
MOTOROLA
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