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10.3.3.2 DATA CACHE ADDRESS REGISTER. The data cache address register
(DC_ADR) contains the address to be used in the command programmed in the CMD field
of the DC_CST. It also may contain the internal address for the read tags and register
operation.
DC_ADR
BIT
0
1
2
FIELD
RESET
R/W
SPR
BIT
16
17
18
FIELD
RESET
R/W
SPR
NOTE: — = Undefined.
ADR—Address
This field represents the address to be used in the command programmed in the DC_CST.
It is also the internal address used to read tags and registers.
10.3.3.3 READING THE CACHE STRUCTURES. To read the data stored in the data
cache tags or registers, follow these steps:
1. Write to the DC_ADR. This register can also be read for debugging purposes.
2. Read the DC_DAT register.
MOTOROLA
3
4
5
6
7
ADR
—
R/W
569
19
20
21
22
23
ADR
—
R/W
569
MPC823e REFERENCE MANUAL
8
9
10
11
12
24
25
26
27
28
Data Cache
13
14
15
29
30
31
10-7
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