Motorola MPC823e Reference Manual page 83

Microprocessor for mobile computing
Table of Contents

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Table 3-1. MPC823e Internal Memory Map (Continued)
INTERNAL
ADDRESS
CPM TIMERS
980
TGCR—Timer Global Configuration Register
982 to 98F
RES—Reserved
990
TMR1—Timer1 Mode Register
992
TMR2—Timer2 Mode Register
994
TRR1—Timer1 Reference Register
996
TRR2—Timer2 Reference Register
998
TCR1—Timer1 Capture Register
99A
TCR2—Timer2 Capture Register
99C
TCN1—Timer1 Counter Register
99E
TCN2—Timer2 Counter Register
9A0
TMR3—Timer3 Mode Register
9A2
TMR4—Timer4 Mode Register
9A4
TRR3—Timer3 Reference Register
9A6
TRR4—Timer4 Reference Register
9A8
TCR3—Timer3 Capture Register
9AA
TCR4—Timer4 Capture Register
9AC
TCN3—Timer3 Counter Register
9AE
TCN4—Timer4 Counter Register
9B0
TER1—Timer1 Event Register
9B2
TER2—Timer2 Event Register
9B4
TER3—Timer3 Event Register
9B6
TER4—Timer4 Event Register
9B8 to 9BF
RES—Reserved
COMMUNICATION PROCESSOR MODULE
9C0
CPCR—Communication Processor Module Command Register
9C2 to 9C3
RES—Reserved
9C4 to 9C7
RCCR/RMDS—RISC Controller Configuration Register and
RISC Microcode Development Support Control Register
9C8 to 9CB
RES—Reserved
9CC
RCTR1—RISC Controller Trap Register 1
9CE
RCTR2—RISC Controller Trap Register 2
MOTOROLA
REGISTER
MPC823e REFERENCE MANUAL
Memory Map
SIZE
PAGE NUMBER
(IN BITS)
LOCATION
16
16-77
16
16-78
16
16-78
16
16-79
16
16-79
16
16-80
16
16-80
16
16-80
16
16-80
16
16-78
16
16-78
16
16-79
16
16-79
16
16-80
16
16-80
16
16-80
16
16-80
16
16-81
16
16-81
16
16-81
16
16-81
16
16-9
16
32
16-7
32
16
16
3-7

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