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12.8.3 Periodic Interrupt Timer Register
The periodic interrupt timer register (PITR) is a read-only register that shows the current
value in the periodic interrupt down counter. Writes to this register do not affect this register
and reads of this register do not have any affect on the counter.
PITR
BIT
0
1
2
FIELD
RESET
R/W
ADDR
BIT
16
17
18
FIELD
RESET
R/W
ADDR
NOTE: — = Undefined.
PIT—Periodic Interrupt Timing Count
This field contains the current count remaining for the periodic timer. Writes have no effect
on this field.
Bits 16–31—Reserved
These bits are reserved and must be set to 0.
MOTOROLA
3
4
5
6
7
PIT
—
R
(IMMR & 0xFFFF0000) + 0x248
19
20
21
22
23
RESERVED
0
R
(IMMR & 0xFFFF0000) + 0x24A
MPC823e REFERENCE MANUAL
System Interface Unit
8
9
10
11
12
24
25
26
27
28
13
14
15
29
30
31
12-25
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