Motorola MPC823e Reference Manual page 836

Communication Processor Module
The expected results are as follows:
• The TX buffer descriptor (Ep0) CONTROL/STATUS field must contain 0x3800.
• The TX buffer descriptor (Ep0) DATA LENGTH field must contain 0x0003.
• The TX buffer descriptor (Ep1) CONTROL/STATUS field must contain 0x3c80.
• The TX buffer descriptor (Ep1) DATA LENGTH field must contain 0x0003.
• The RX buffer descriptor (Ep0) CONTROL/STATUS field must contain 0x3c00.
• The RX buffer descriptor (Ep0) DATA LENGTH field must contain 0x0005.
• The RX buffer descriptor (Ep0) DATA BUFFER field must contain 0xabcd122b,
0x42xxxxxx.
16.11 THE SERIAL MANAGEMENT CONTROLLERS
The serial management controllers (SMCs) consist of two full-duplex ports that can be
independently configured to support any one of three protocols or modes—UART,
Transparent, or general-circuit interface (GCI). Simple UART operation is used to provide a
debug/monitor port in an application, which allows a serial communication controller (SCCx)
to be free for other purposes. The serial management controller clock can be derived from
one of the four internal baud rate generators or from a 16 × external clock pin.
The functionality and performance provided by the SMCx in UART mode is generally less
than that provided by an SCCx in UART mode. The SMCx implementation does not support
such features as special character recognition and detection.
In totally Transparent mode, a serial management controller can use a TDM channel to
connect to a T1 line or directly to the SMC's set of pins. However, SMC2 does not have its
own set of dedicated pins, so the time-slot assigner pins are its only option. The receive and
transmit clocks are derived from the time-division multiplex (TDM) channels, the internal
baud rate generators, or from an external 1 × clock. The Transparent protocol allows the
transmitter and receiver to use the external synchronization pin.
16-382 MPC823e REFERENCE MANUAL MOTOROLA