Motorola MPC823e Reference Manual page 131

When a timer expires, if enabled, the TEXP pin is asserted asynchronously with CLKOUT
to show that the MPC823e is preparing to exit power-down mode. TEXP must be externally
connected to a switch that must turn on the power supply to the chip, as illustrated in
Figure 5-16.
In normal and doze modes, the system can be in the high mode defined by the DFNH field
or in the low mode defined by the DFNL field. The MPC823e is in normal high mode after
reset and this also the default state when the condition to exit low-power mode occurs.
Table 5-7 provides the power consumption equations for each of these modes
OPERATION UDR2 (.42µ)
MODE EQUATION
Normal High ≅ 20 mW + (.78)/2
DFNH
LPM=00
TEXPS=1
Normal Low ≅ 20 mW + (.78)/2
(DFNL+1)
LPM=00
TEXPS=1
Doze High ≅ 20mW + 0.4(.78)/2
DFNH
LPM=01
TEXPS=1
≅ 20 mW + 0.4(.78)/
Doze Low
LPM=01 (DFNL+1)
2 W
TEXPS=1
Sleep LPM=10 —
TEXPS=1
Deep-Sleep —
LPM=11
TEXPS=1
Power-Down —
LPM=11
TEXPS=0
NOTE: The above currents are measured at 3.3V.
Note: The communication processor module has its own power conservation logic,
which it uses to automatically shut down its own clock when idle.
MOTOROLA
Table 5-7. MPC823e Low-Power Modes
POWER @ CDR2 (.36µ) EQUATION
50MHZ
UDR2
(.42µ)
860mW ≅ 20 mW + (.555)/2
W
450 mW ≅ 20 mW + (.555)/2
W
356 mW ≅ 20 mW + 0.4(.555)/2
W
188 mW ≅ 20 mW + 0.4(.555)/2
10 mW
40µA
10µA
MPC823e REFERENCE MANUAL
Clocks and Power Control
POWER @ POWER @
25MHZ 50MHZ
CDR2
(.36µ)
298 mW 575 mW
DFNH
W
159 mW 298 mW
(DFNL+1)
W
132 mW 242 mW
DFNH
W
(DFNL+1) 76 mW 131 mW
W
— 10 mW
— 40µA
— 10µA
POWER @
66MHZ
CDR2 CDR2
(.36µ) (.36µ)
750 mW
385 mW
312 mW
166 mW
10 mW 10 mW
40µA 40µA
10µA 10µA
5-31